// File: STM32G4xx_DGBMCU.ini // Version: 1.0.0 // Note: refer to STM32G4xx Reference manual (RM0440) // refer to STM32G4xx datasheets /* variable to hold register values */ define unsigned long DbgMCU_CR; define unsigned long DbgMCU_APB1_Fz1; define unsigned long DbgMCU_APB1_Fz2; define unsigned long DbgMCU_APB2_Fz; // <<< Use Configuration Wizard in Context Menu >>> // Debug MCU configuration register (DBGMCU_CR) // Reserved bits must be kept at reset value // TRACE_MODE Trace Mode // <0=> Asynchronous // <1=> Synchronous: TRACEDATA Size 1 // <2=> Synchronous: TRACEDATA Size 2 // <3=> Synchronous: TRACEDATA Size 4 // TRACE_IOEN Trace I/O Enable // DBG_STANDBY Debug Standby mode // DBG_STOP Debug Stop mode // DBG_SLEEP Debug Sleep mode // DbgMCU_CR = 0x00000007; // Debug MCU APB1 freeze register1 (DBGMCU_APB1FZR1) // Reserved bits must be kept at reset value // DBG_LPTIM1_STOP LPTIM1 counter stopped when core is halted // DBG_I2C3_STOP I2C3 SMBUS timeout counter stopped when core is halted // DBG_I2C2_STOP I2C2 SMBUS timeout counter stopped when core is halted // DBG_I2C1_STOP I2C1 SMBUS timeout counter stopped when core is halted // DBG_IWDG_STOP Independent watchdog counter stopped when core is halted // DBG_WWDG_STOP Window watchdog counter stopped when core is halted // DBG_RTC_STOP RTC counter stopped when core is halted // DBG_TIM7_STOP TIM7 counter stopped when core is halted // DBG_TIM6_STOP TIM6 counter stopped when core is halted // DBG_TIM5_STOP TIM5 counter stopped when core is halted // DBG_TIM4_STOP TIM4 counter stopped when core is halted // DBG_TIM3_STOP TIM3 counter stopped when core is halted // DBG_TIM2_STOP TIM2 counter stopped when core is halted // DbgMCU_APB1_Fz1 = 0x00000000; // Debug MCU APB1 freeze register 2 (DBGMCU_APB1FZR2) // Reserved bits must be kept at reset value // DBG_I2C4_STOP I2C4 SMBUS timeout counter stopped when core is halted // DbgMCU_APB1_Fz2 = 0x00000000; // Debug MCU APB2 freeze register (DBGMCU_APB2FZR) // Reserved bits must be kept at reset value // DBG_HRTIM_STOP HRTIM counter stopped when core is halted // DBG_TIM20_STOP TIM20 counter stopped when core is halted // DBG_TIM17_STOP TIM17 counter stopped when core is halted // DBG_TIM16_STOP TIM16 counter stopped when core is halted // DBG_TIM15_STOP TIM15 counter stopped when core is halted // DBG_TIM8_STOP TIM8 counter stopped when core is halted // DBG_TIM1_STOP TIM1 counter stopped when core is halted // DbgMCU_APB2_Fz = 0x00000000; // TPIU Pin Routing // TRACECLK: Pin PE2 // TRACED[0]: Pin PE3 // TRACED[1]: Pin PE4 // TRACED[2]: Pin PE5 // TRACED[3]: Pin PE6 // // <<< end of configuration section >>> /*---------------------------------------------------------------------------- Setup_TracePins() configure the used trace pins *----------------------------------------------------------------------------*/ FUNC void Setup_TracePins (unsigned char trace_mode) { if (trace_mode == 0) { /* asynchronous mode */ /* configure SWO (PB3) */ _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000002) ); // RCC_AHB2ENR: IO port B clock enable _WDWORD(0x48000400, ((_RDWORD(0x48000400) & ~0x000000C0) | 0x00000080) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48000408, ((_RDWORD(0x48000408) ) | 0x000000C0) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800040C, ((_RDWORD(0x4800040C) & ~0x000000C0) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48000420, ((_RDWORD(0x48000420) & ~0x0000F000) ) ); // GPIOx_AFRL: Alternate Function to AF0 } else { /* synchronous mode */ /* configure TRACECLK (PE2) */ _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000010) ); // RCC_AHB2ENR: IO port E clock enable _WDWORD(0x48001000, ((_RDWORD(0x48001000) & ~0x00000030) | 0x00000020) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48001008, ((_RDWORD(0x48001008) ) | 0x00000030) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800100C, ((_RDWORD(0x4800100C) & ~0x00000030) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48001020, ((_RDWORD(0x48001020) & ~0x00000F00) ) ); // GPIOx_AFRL: Alternate Function to AF0 switch (trace_mode) { case 3: /* TRACEDATA[3..2] */ /* configure TRACED3 */ /* configure TRACED3 (PE6) */ // _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000010) ); // RCC_AHB2ENR: IO port E clock enable _WDWORD(0x48001000, ((_RDWORD(0x48001000) & ~0x00003000) | 0x00002000) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48001008, ((_RDWORD(0x48001008) ) | 0x00003000) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800100C, ((_RDWORD(0x4800100C) & ~0x00003000) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48001020, ((_RDWORD(0x48001020) & ~0x0F000000) ) ); // GPIOx_AFRL: Alternate Function to AF0 /* configure TRACED2 */ /* configure TRACED2 (PE5) */ // _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000010) ); // RCC_AHB2ENR: IO port E clock enable _WDWORD(0x48001000, ((_RDWORD(0x48001000) & ~0x00000C00) | 0x00000800) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48001008, ((_RDWORD(0x48001008) ) | 0x00000C00) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800100C, ((_RDWORD(0x4800100C) & ~0x00000C00) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48001020, ((_RDWORD(0x48001020) & ~0x00F00000) ) ); // GPIOx_AFRL: Alternate Function to AF0 case 2: /* TRACEDATA[1] */ /* configure TRACED1 */ /* configure TRACED1 (PE4) */ // _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000010) ); // RCC_AHB2ENR: IO port E clock enable _WDWORD(0x48001000, ((_RDWORD(0x48001000) & ~0x00000300) | 0x00000200) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48001008, ((_RDWORD(0x48001008) ) | 0x00000300) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800100C, ((_RDWORD(0x4800100C) & ~0x00000300) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48001020, ((_RDWORD(0x48001020) & ~0x000F0000) ) ); // GPIOx_AFRL: Alternate Function to AF0 case 1: /* TRACEDATA[0] */ /* configure TRACED0 */ /* configure TRACED0 (PE3) */ // _WDWORD(0x4002104C, ( _RDWORD(0x4002104C) | 0x00000010) ); // RCC_AHB2ENR: IO port E clock enable _WDWORD(0x48001000, ((_RDWORD(0x48001000) & ~0x000000C0) | 0x00000080) ); // GPIOx_MODER: Set Mode (Alternate Function) _WDWORD(0x48001008, ((_RDWORD(0x48001008) ) | 0x000000C0) ); // GPIOx_OSPEEDR: Set Speed (Very High Speed) _WDWORD(0x4800100C, ((_RDWORD(0x4800100C) & ~0x000000C0) ) ); // GPIOx_PUPDR: Set I/O to no pull-up/pull-down _WDWORD(0x48001020, ((_RDWORD(0x48001020) & ~0x0000F000) ) ); // GPIOx_AFRL: Alternate Function to AF0 break; } } } /*---------------------------------------------------------------------------- Setup_DBGMCU() configure DBGMCU registers *----------------------------------------------------------------------------*/ FUNC void Setup_DBGMCU (void) { if (DbgMCU_CR & (1 << 5)){ Setup_TracePins (((DbgMCU_CR >> 6) & 3)); } _WDWORD(0xE0042004, DbgMCU_CR); // Set DBGMCU_CR _WDWORD(0xE0042008, DbgMCU_APB1_Fz1); // Set DBGMCU_APB1FZR1 _WDWORD(0xE004200C, DbgMCU_APB1_Fz2); // Set DBGMCU_APB1FZR2 _WDWORD(0xE0042010, DbgMCU_APB2_Fz); // Set DBGMCU_APB2FZR } /*---------------------------------------------------------------------------- OnResetExec() Executed after reset via uVision's 'Reset'-button *----------------------------------------------------------------------------*/ FUNC void OnResetExec (void) { Setup_DBGMCU(); } Setup_DBGMCU(); // Debugger Setup